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SA56613-XX 5 V, 150 mA LDO and independent delayed RESET
Product data 2002 Mar 25
Philips Semiconductors
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
DESCRIPTION
The SA56613-XX has a precise fixed 5 V output with a typical accuracy of 2% to provide very low dropout and low noise in CD-ROM drives, battery-operated systems, and portable computers applications. This regulator consists of an internal voltage reference, an error amplifier, a driver with current limiter and a thermal shutdown. An Active-LOW RESET is asserted when the regulator output voltage (VOUT) falls below the reset detection voltage threshold. The SA56613-XX is available with fixed detection threshold voltages of 4.2, 4.5, and 4.7 V. The RESET output remains low for 1 ms (typical) when a 10 nF capacitor is connected to CD pin. The reset time delay can be adjusted by replacing capacitance values from CD pin to Ground. The device is available in the small SO8 package.
FEATURES
* Very low dropout voltage: 250 mV typ. (Iout = 30 mA) * High precision output voltage: 2% * Output current capacity: 150 mA * Low Noise: 200 Vrms typ. @ 20 Hz to 80 kHz and for * Extremely good line regulation: 10 mV typical * Very good load regulation: 40 mV typical * Low temperature drift co-efficient to VOUT: 100 ppm/C * Internal current limit and thermal shut-down circuits * Adjustment-free reset detection voltages: 4.2 V typ., 4.5 V typ.
and 4.7 V typ. IOUT = 30 mA
APPLICATIONS
* TV and monitors * Electronic notebooks, PDAs and Palmtop computers * Cameras, VCRs and camcorders * PCMCIA cards and CD-ROM drives * Modems * Battery-powered or hand-held instruments
* Delay time can be adjusted by external capacitor. * Wide operating temperature range: -40 C to +85 C
SIMPLIFIED SYSTEM DIAGRAM
VIN VOUT +5 V COUT 4.7 F (AL-Electrolytic) 2 1 0.1 F GND RESET
A 0.1 F (Ceramic)
4
5
SA56613-XX
CD 3
SL01648
Figure 1. Simplified system diagram.
2002 Mar 25
2
853-2331 27919
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
ORDERING INFORMATION
PACKAGE TYPE NUMBER NAME SA56613-XXD SO8 DESCRIPTION plastic small outline package; 8 leads; body width 3.9 mm TEMPERATURE RANGE -40 to +85 C
NOTE: The device has 3 voltage options, indicated by the XX on the `Type number'. XX 42 45 47 OUTPUT VOLTAGE (Typical) 5.0 V 5.0 V 5.0 V RESET THRESHOLD (Typical) 4.2 V 4.5 V 4.7 V
PIN CONFIGURATION
TOP VIEW GND RESET CD VIN 1 2 8 7 NC GND GND VOUT
PIN DESCRIPTION
PIN 1 2 SYMBOL GND RESET Ground Active-LOW reset signal output pin. The output remains LOW while VOUT is below VSH, the reset threshold, and for an external set time delay CD pin after VOUT rises above reset threshold. 3 CD Reset delay time capacitor pin. RESET pin output delay time can be set by the capacitance connected to the CD pin. tPLH = 105 x C where: tPLH = transmission delay time (s) C = capacitor value (F) 4 5 6 7 8 VIN VOUT GND GND N/C Supply voltage input pin Regulated output voltage pin Ground pin and heat sink Ground pin and heat sink No connection DESCRIPTION
SO8
3 4 6 5
SL01649
Figure 2. Pin configuration.
MAXIMUM RATINGS
SYMBOL VIN IOUT Topr Tstg Tj(max) PD Input supply voltage Output current Operating ambient temperature Storage temperature Maximum junction temperature Power dissipation (Note 1) Derate 6.5 mW/C above Tamb 25 C PARAMETER MIN. -0.3 - -40 -40 - - MAX. +18 200 +85 +150 +125 650 UNIT V mA C C C mW
NOTE: 1. When mounted on a 55 x 20 mm paper phenol board.
2002 Mar 25
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
ELECTRICAL CHARACTERISTICS
Tamb = 25 C, Figure 13 "Test circuit", unless otherwise specified. SYMBOL ICCq1 ICCq2 Regulator VOUT Vi/o(dif) V1 V2 VOUT/T RR Vn(o) Reset VS Detection voltage VIN = H L SA56613-42 SA56613-45 SA56613-47 Tj = -20 C +85 C VIN = H L H VIN = 3.9 V; RL = 4.7 k VIN = 4 V 5 V; CD = 0.1 F VIN = 5 V 4 V; CD = 0.1 F VOL = 0.4 V 4.03 4.31 4.51 - 25 - 5 - - 4.20 4.50 4.70 100 50 100 10 30 0.65 4.37 4.69 4.89 - 100 200 15 90 0.85 V V V ppm/C mV mV ms s V Output voltage Input/output differential voltage Line regulation Load regulation VOUT temperature coefficient (Note 1) Ripple rejection (Note 1) Noise output voltage (Note 1) VIN = 6 V; IOUT = 30 mA VIN = 4.8 V; IOUT = 150 mA VIN = 6 V 10 V; IOUT = 30 mA VIN = 6 V; IOUT = 0 mA 150 mA Tj = -20 C +85 C; VIN = 6 V; IOUT = 30 mA VIN = 6 V; f = 120 Hz; VRIPPLE = 1 Vp-p; IOUT = 30 mA VIN = 6 V; f = 20 80 kHz; IOUT = 30 mA 4.90 - - - - 50 - 5.00 0.25 10 40 100 60 200 5.10 0.5 30 80 - - 400 V V mV mV ppm/C dB Vrms PARAMETER No-load input current 1 No-load input current 2 CONDITIONS VIN = 6 V; IOUT = 0 mA VIN = 4 V; IOUT = 0 mA MIN. - - TYP. 400 2.5 MAX. 800 - UNIT A A
VS/T VS VOL tPLH1 tPHL VOPL
VS temperature coefficient (Note 1) Hysteresis voltage LOW-level output voltage Reset delay time `L' transmission delay time (Note 1) Threshold operating voltage
NOTE: 1. This parameter is guaranteed by design.
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
TYPICAL PERFORMANCE CURVES (SA56613-42D)
6 3.0
OUTPUT VOLTAGE (V)
VOUT 4
QUIESCENT CURRENT (mA) 6 7
5
2.5
2.0
3
1.5
2 RESET 1
1.0
0.5
0 0 1 2 3 4 5
0 0 2 4 6 8 10 12 14 16
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
SL01658
SL01657
Figure 3. Detection voltage (IOUT = 0 mA).
Figure 4. Quiescent current (IOUT = 0 mA).
30
60
20 LINE REGULATION (mV) LOAD REGULATION (mV) 4 6
40
10
20
0
0
-10
-20
-20
-40
-30 8 10 INPUT VOLTAGE (V) 12 14 16
-60 0 50 100 150
OUTPUT CURRENT (mA)
SL01652
SL01653
Figure 5. Line regulation.
Figure 6. Load regulation.
100 90 80 RIPPLE REJECTION (dB) 70 60 50 40 30 20 10 0 10 OUTPUT VOLTAGE (V) 100 1000 FREQUENCY (Hz) 10000 100000
6
5
4
3
2
1
0 0 50 100 150 200 250 300
OUTPUT CURRENT (mA)
SL01638
SL01654
Figure 7. Ripple rejection.
Figure 8. Current limit.
2002 Mar 25
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
100
800 ON BOARD 55 x 22 mm 700 POWER DISSIPATION (mW) 600 6.5 mW/C 500 400 300 200 100
DELAY TIME (ms)
10
1 0.01
0.1 CD CAPACITOR (F)
1
0 -25
0
25
50
75
100
125
TEMPERATURE (C)
SL01656
SL01655
Figure 9. Reset delay time.
Figure 10. Power dissipation.
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
TIMING DIAGRAM
The Timing Diagram in Figure 11 depicts the operation of the device. Letters A-I on the Time axis indicates specific events. A: At "A", VOUT abruptly begins to increase. Also the RESET voltage initially increases but abruptly decreases when VOUT reaches the threshold operating level (typically 0.65 V) that activates the internal bias circuitry and RESET is asserted. B: At "B",VOUT reaches the threshold level of VSH. At this point the delay time, tPLH is initiated while VOUT rises above VSH to its normal operating level of 5 V. The RESET voltage remains LOW. C: At "C", VOUT is above VSL and the delay time, tPLH elapses. At this instant, the device releases the hold on the RESET. The reset output then goes HIGH. In a microprocessor based system these events release the reset from the microprocessor, allowing the microprocessor to function normally. D-E: At "D", VIN falls below 5 V, causing VOUT to follow. VOUT continues to fall until the VSL undervoltage detection threshold is reached at "E". This causes a reset signal to be generated (RESET goes LOW). E-F: Between "E" and "F", VOUT continues to fall and then starts rising. F: At "F", VOUT rises to the VSH level. Once again, the device initiates the delay timer. F-G: VOUT rises above VSH and returns to normal 5 V output. At "G", the delay (tPLH) times out and once again, then it releases the hold on the RESET and it goes HIGH. G-H: At "G", VOUT is above the upper threshold and begins to fall, causing RESET to follow it. As long as VOUT remains above the VSL, no reset signal will be generated. H: At event "H", VOUT falls until the VSL undervoltage detection threshold is reached. At this level, a RESET signal is generated and RESET goes LOW. I: At event "I", VOUT has decreased until normal internal circuit bias is unable to maintain a RESET. As a result, VCC may rise to less than 0.65 V. As VCC decreases further, the VOUT reset also decreases to zero.
10 V
VIN
5V
0V
5V VSH VSL
VOUT
VS
0V
5V
RESET
tPLH 0V A B C DE F G H I tPLH
SL01651
Figure 11. Timing diagram.
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
APPLICATION INFORMATION Input capacitor
An input capacitor of 1 F is required to eliminate the AC coupling noise. This capacitor must be located as close as possible to VIN or GND pin (not more than 1 cm) and returned to a clean analog ground. Any good quality ceramic, tantalum or film capacitor will work.
PCB layout
The component placement around the LDO should be done carefully to achieve good dynamic line and load response. The input and noise capacitors should be kept close to the LDO. The rise in junction temperature depends on how efficiently the heat is carried away from the junction to ambient. The junction to lead thermal impedance is a characteristic of the package and fixed. The thermal impedance between lead to ambient can be reduced by increasing the copper area on the PCB. Increase the input, output and ground trace area to reduce the junction-to-ambient impedance.
Output capacitor
Phase compensation is made for securing stable operation even if the load current varies. For this reason, an output capacitor with good frequency characteristics is needed. Set it as close to the circuit as possible and make the wiring as short as possible. The value of the output capacitance has to be at least 47 F connected from VOUT to GND. When operating from sources other than batteries, supply-noise rejection and transient response can be improved by increasing the value of the input and output capacitors and employing passive filtering techniques.
Power dissipation
The SA56613-XX maximum power dissipation depends on the thermal resistance from the die junction to the ambient air. The maximum power dissipation shown in Figure 10 is 650 mW at ambient temperature of 25 C. It is derated at 6.5 mW/C above 25 C. Power dissipation of the device is PD = IOUT (VIN - VOUT). The maximum power dissipation is: P max + (T j * T amb) (q JA) Eqn. (3)
RESET output
The SA56613-XX has an Active-LOW RESET output. When VOUT of the regulator rises above VSH, the upper detection threshold voltage, the reset delay time is initiated. After the programmed delay time elapses, RESET is released and goes HIGH. The time delay can be set typically from 1 ms to 100 ms by connecting a time delay capacitor from CD (pin 3) to ground (see Figure 9: RESET Delay time versus CD, Delay Capacitor). The RESET delay time (tPLH) can be approximated by the following equation:
where JA = JB + BA, the junction-to-ambient thermal resistance, JA calculated from Figure 10 is 154 C/W; JB is the thermal resistance from the die junction to PCB material and copper traces; BA is the thermal resistance from the PCB material and copper traces to the surrounding air. The GND pin provides an electrical connection to ground and a path for heat transfer from the device to the PCB and to the surrounding air. To maximize heat transfer, connect the GND pin to a large ground pad or ground plane. The following example determines the maximum IOUT at Tamb = 25 C for VIN = 1 V. I OUT + PD + 650 mW + 92.8mA (V IN * V OUT) (12 * 5) Eqn. (4)
t PLH + 10 5
C
Eqn. (1)
(Time is expressed in seconds, Capacitance in Farads.) For example, for a delay capacitor, CD of 0.1 F (100 nF), tPLH is approximately 10 ms. When the regulator output Voltage falls to or below VSL, the lower detection threshold voltage, the RESET output is asserted and it goes to an Active-LOW state. This "LOW" transmission delay time is typically 30 s with CD at 100 nF.
Reset hysteresis voltage
The reset hysteresis voltage, VS is defined in the following equation: DV S + V SH * V SL Eqn. (2)
The maximum output current of the SA56613-XX is reduced as the input voltage, VIN and the ambient temperature, Tamb increase.
Hysteresis voltage is typically 50 mV. This small level of hysteresis ensures that the reset will not dither when the regulator VOUT is noisy.
VIN 0.1 F CERAMIC
VIN
4
5
VOUT COUT 4.7 F RESET
VCC LOGIC SYSTEM
SA56613-XX
CD 3 1 GND 2
RESET GND
0.1 F
SL01729
Figure 12. Typical application circuit.
2002 Mar 25
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
A 0.1 F
VIN
4
5
VOUT
A
SA56613-XX
CD 3 1 0.1 F GND 2 RESET
4.7 F
V
SL01650
Figure 13. Test circuit.
PACKING METHOD
The SA56613-XX is packed in reels, as shown in Figure 14.
GUARD BAND
TAPE REEL ASSEMBLY
TAPE DETAIL
COVER TAPE
CARRIER TAPE
BARCODE LABEL
BOX
SL01305
Figure 14. Tape and reel packing method.
2002 Mar 25
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
SO8: plastic small outline package; 8 leads; body width 3.9 mm
pin 1 index
B2 1.73 0.068
4.95 4.80 0.189 0.195 0.51 0.33 0.013 0.020 4.95 4.80 1.27 0.38 0.050 0.015
0.076 0.003
SO8
2002 Mar 25
10
Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
NOTES
2002 Mar 25
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Philips Semiconductors
Product data
5 V, 150 mA LDO and independent delayed RESET
SA56613-XX
Data sheet status
Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 08-02
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 10039
Philips Semiconductors
2002 Mar 25 12

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